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PCIMX258CJM4A bảng dữ liệu(PDF) 86 Page - Freescale Semiconductor, Inc

tên linh kiện PCIMX258CJM4A
Giải thích chi tiết về linh kiện  i.MX25 Applications Processor for Consumer and Industrial Products
PDF  144 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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PCIMX258CJM4A bảng dữ liệu(HTML) 86 Page - Freescale Semiconductor, Inc

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i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3
86
Freescale Semiconductor
3.7.9.1.2
MII Transmit Signal Timing (FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER, and
FEC_TX_CLK)
The transmitter functions correctly up to an FEC_TX_CLK maximum frequency of 25 MHz + 1%. There
is no minimum frequency requirement. Additionally, the processor clock frequency must exceed twice the
FEC_TX_CLK frequency.
Figure 56 shows MII transmit signal timings. Table 61 describes the timing parameters (M5–M8) shown
in the figure.
Figure 56. MII Transmit Signal Timing Diagram
1 FEC_TX_EN, FEC_TX_CLK, and FEC_TXD0 have the same timing in 10-Mbps 7-wire interface mode.
3.7.9.1.3
MII Asynchronous Inputs Signal Timing (FEC_CRS and FEC_COL)
Figure 57 shows MII asynchronous input timings. Table 62 describes the timing parameter (M9) shown
in the figure.
Figure 57. MII Async Inputs Timing Diagram
Table 61. MII Transmit Signal Timing
ID
Characteristic1
Min.
Max.
Unit
M5
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER invalid
5
—
ns
M6
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER valid
—
20
ns
M7
FEC_TX_CLK pulse width high
35%
65%
FEC_TX_CLK period
M8
FEC_TX_CLK pulse width low
35%
65%
FEC_TX_CLK period
FEC_TX_CLK (input)
FEC_TXD[3:0] (outputs)
FEC_TX_EN
FEC_TX_ER
M7
M8
M5
M6
FEC_CRS, FEC_COL
M9



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