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HT45R37V bảng dữ liệu(PDF) 45 Page - Holtek Semiconductor Inc

tên linh kiện HT45R37V
Giải thích chi tiết về linh kiện  TinyPower C/R-F Type 8-Bit OTP MCU
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HT45R37V
Rev. 1.00
45
October 20, 2009
The SIMDR register is used to store the data being
transmitted and received. The same register is used by
both the SPI and I
2 C functions. Before the
microcontroller writes data to the SPI bus, the actual
data to be transmitted must be placed in the SIMDR reg-
ister. After the data is received from the SPI bus, the
microcontroller can read it from the SIMDR register. Any
transmission or reception of data from the SPI bus must
be made via the SIMDR register.
Bit
76543210
Label SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
There are also two control registers for the SPI inter-
face, SIMCTL0 and SIMCTL2. Note that the SIMCTL2
register also has the name SIMAR which is used by the
I
2C function. The SIMCTL1 register is not used by the
SPI function, only by the I
2C function. Register
SIMCTL0 is used to control the enable/disable function
and to set the data transmission clock frequency. Regis-
ter SIMCTL2 is used for other control functions such as
LSB/MSB selection, write collision flag etc. The
SIMIDLE bit in the CLKMOD register is used to select if
the SIM continues running when the device is in the
IDLE mode. Setting the bit high allows the SIM to main-
tain operation when the device is in the Idle mode.
Clearing the bit to zero disables any SIM operations
when in the Idle mode.
The following gives further explanation of each
SIMCTL1 register bit:
· SIMEN
The bit is the overall on/off control for the SPI inter-
face. When the SIMEN bit is cleared to zero to disable
the SPI interface, the SDI, SDO, SCK and SCS lines
will be in a floating condition and the SPI operating
current will be reduced to a minimum value. When the
bit is high the SPI interface is enabled. The SIMconfig-
uration option must have first enabled the SIM inter-
face for this bit to be effective. Note that when the
SIMEN bit changes from low to high the contents of
the SPI control registers will be in an unknown condi-
tion and should therefore be first initialised by the ap-
plication program.
· SIM0~SIM2
These bits setup the overall operating mode of the SIM
function. As well as selecting if the I
2C or SPI function,
they are used to control the SPI Master/Slave selec-
tion and the SPI Master clock frequency. The SPI
clock is a function of the system clock but can also be
chosen to be sourced from the Timer/Event Counter. If
the SPI Slave Mode is selected then the clock will be
supplied by an external Master device.
SIM0
SIM1
SIM2
SPI Master/Slave Clock
Control and I2C Enable
0
0
0
SPI Master, fSYS/4
0
0
1
SPI Master, fSYS/16
0
1
0
SPI Master, fSYS/64
0
1
1
SPI Master, fSUB
100
SPI Master Timer/Event
Counter 0 output/2
1
0
1
SPI Slave
110
I
2C mode
1
1
0
Not used



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