ATmega64A datasheet(261/392 Pages) ATMEL

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261

8160C–AVR–07/09

ATmega64A

Figure 25-2. Reset Register

25.3.4

Boundary-scan Chain

The Boundary-scan Chain has the capability of driving and observing the logic levels on the dig-

ital I/O pins, as well as the boundary between digital and analog logic for analog circuitry having

Off-chip connections.

See “Boundary-scan Chain” on page 262 for a complete description.

25.4

Boundary-scan Specific JTAG Instructions

The instruction register is 4-bit wide, supporting up to 16 instructions. Listed below are the JTAG

instructions useful for Boundary-scan operation. Note that the optional HIGHZ instruction is not

implemented, but all outputs with tri-state capability can be set in high-impedant state by using

the AVR_RESET instruction, since the initial state for all port pins is tri-state.

As a definition in this datasheet, the LSB is shifted in and out first for all Shift Registers.

The OPCODE for each instruction is shown behind the instruction name in hex format. The text

describes which data register is selected as path between TDI and TDO for each instruction.

25.4.1

EXTEST; 0x0

Mandatory JTAG instruction for selecting the Boundary-scan Chain as data register for testing

circuitry external to the AVR package. For port-pins, Pull-up Disable, Output Control, Output

Data, and Input Data are all accessible in the scan chain. For analog circuits having Off-chip

connections, the interface between the analog and the digital logic is in the scan chain. The con-

tents of the latched outputs of the Boundary-scan Chain is driven out as soon as the JTAG IR-

The active states are:

• Capture-DR: Data on the external pins are sampled into the Boundary-scan Chain.

• Shift-DR: The internal scan chain is shifted by the TCK input.

• Update-DR: Data from the scan chain is applied to output pins.

From

TDI

ClockDR · AVR_RESET

TDO

From Other Internal and

External Reset Sources

Internal Reset

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