ATmega64A datasheet(56/392 Pages) ATMEL

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8160C–AVR–07/09

ATmega64A

Figure 10-7. Watchdog Timer

10.3

Timed Sequences for Changing the Configuration of the Watchdog Timer

The sequence for changing configuration differs slightly between the three safety levels. Sepa-

rate procedures are described for each level.

10.3.1

Safety Level 0

This mode is compatible with the Watchdog operation found in ATmega103. The Watchdog

Timer is initially disabled, but can be enabled by writing the WDE bit to 1 without any restriction.

The Time-out period can be changed at any time without restriction. To disable an enabled

Watchdog Timer, the procedure described on page 57 (WDE bit description) must be followed.

10.3.2

Safety Level 1

In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit

to 1 without any restriction. A timed sequence is needed when changing the Watchdog Time-out

period or disabling an enabled Watchdog Timer. To disable an enabled Watchdog Timer, and/or

changing the Watchdog Time-out, the following procedure must be followed:

In the same operation, write a logic one to WDCE and WDE. A logic one must be written

to WDE regardless of the previous value of the WDE bit.

Within the next four clock cycles, in the same operation, write the WDE and WDP bits as

desired, but with the WDCE bit cleared.

Table 10-1.

WDT Configuration as a Function of the Fuse Settings of M103C and WDTON

M103C

WDTON

Safety

Level

WDT Initial

State

How to Disable

the WDT

How to Change

Time-out

Unprogrammed

Disabled

Timed

sequence

Timed sequence

Unprogrammed

Programmed

Enabled

Always enabled

Timed sequence

Programmed

Unprogrammed

Disabled

Timed

sequence

No restriction

Programmed

Enabled

Always enabled

Timed sequence

WATCHDOG

OSCILLATOR

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