ATmega1284P datasheet(219/380 Pages) ATMEL

219 / 380 page

219

8059D–AVR–11/09

ATmega1284P

19.7.1

Master Transmitter Mode

In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver

(see Figure 19-11 on page 219). In order to enter a Master mode, a START condition must be

transmitted. The format of the following address packet determines whether Master Transmitter

or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if

SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this section

assume that the prescaler bits are zero or are masked to zero.

Figure 19-11. Data Transfer in Master Transmitter Mode

A START condition is sent by writing the following value to TWCR:

TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one to trans-

mit a START condition and TWINT must be written to one to clear the TWINT Flag. The TWI will

then test the 2-wire Serial Bus and generate a START condition as soon as the bus becomes

free. After a START condition has been transmitted, the TWINT Flag is set by hardware, and the

status code in TWSR will be 0x08 (see Table 19-2 on page 220). In order to enter MT mode,

SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit

should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing

the following value to TWCR:

When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is

set again and a number of status codes in TWSR are possible. Possible status codes in Master

mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes

is detailed in Table 19-2 on page 220.

When SLA+W has been successfully transmitted, a data packet should be transmitted. This is

done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not,

the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis-

ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the

transfer. This is accomplished by writing the following value to TWCR:

TWCR

TWINT

TWEA

TWSTA

TWSTO

TWWC

TWEN

–

TWIE

value

TWCR

TWINT

TWEA

TWSTA

TWSTO

TWWC

TWEN

–

TWIE

value

TWCR

TWINT

TWEA

TWSTA

TWSTO

TWWC

TWEN

–

TWIE

value

Device 1

MASTER

TRANSMITTER

Device 2

SLAVE

RECEIVER

Device 3

Device n

SDA

SCL

........

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