ATmega16U4 datasheet(54/408 Pages) ATMEL

54 / 408 page

7766D–AVR–01/09

ATmega16U4/ATmega32U4

ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three

conditions above to ensure that the reference is turned off before entering Power-down mode.

Note:

1. Values are guidelines only. Actual values are TBD.

8.2

Watchdog Timer

ATmega16U4/ATmega32U4 has an Enhanced Watchdog Timer (WDT). The main features are:

• Clocked from separate On-chip Oscillator

• 3 Operating modes

–Interrupt

– System Reset

– Interrupt and System Reset

• Selectable Time-out period from 16ms to 8s

• Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode

Figure 8-8.

Watchdog Timer

The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 kHz oscillator.

The WDT gives an interrupt or a system reset when the counter reaches a given time-out value.

In normal operation mode, it is required that the system uses the WDR - Watchdog Timer Reset

- instruction to restart the counter before the time-out value is reached. If the system doesn't

restart the counter, an interrupt or system reset will be issued.

In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used

to wake the device from sleep-modes, and also as a general system timer. One example is to

limit the maximum time allowed for certain operations, giving an interrupt when the operation

has run longer than expected. In System Reset mode, the WDT gives a reset when the timer

Table 8-4.

Internal Voltage Reference Characteristics(1)

Symbol

Parameter

Condition

Min

Typ

Max

Units

VBG

Bandgap reference voltage

TBD

1.1

TBD

tBG

Bandgap reference start-up time

TBD

µs

IBG

Bandgap reference current

consumption

TBD

µA

128kHz

OSCILLATOR

WDP0

WDP1

WDP2

WDP3

WATCHDOG

RESET

WDE

WDIF

WDIE

MCU RESET

INTERRUPT

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