ATmega16U4 datasheet(42/408 Pages) ATMEL

42 / 408 page

7766D–AVR–01/09

ATmega16U4/ATmega32U4

Power Management and Sleep Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby saving

power. The AVR provides various sleep modes allowing the user to tailor the power consump-

tion to the application’s requirements.

To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a

SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select

which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be

activated by the SLEEP instruction. See Table 7-1 for a summary. If an enabled interrupt occurs

while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in

addition to the start-up time, executes the interrupt routine, and resumes execution from the

instruction following SLEEP. The contents of the Register File and SRAM are unaltered when

the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and

executes from the Reset Vector.

Figure 6-1 on page 27 presents the different clock systems in the ATmega16U4/ATmega32U4,

and their distribution. The figure is helpful in selecting an appropriate sleep mode.

7.0.1

Sleep Mode Control Register – SMCR

The Sleep Mode Control Register contains control bits for power management.

• Bits 3, 2, 1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the six available sleep modes as shown in Table 7-1.

Note:

1. Standby modes are only recommended for use with external crystals or resonators.

• Bit 1 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

Bit

7654

––––

SM2

SM1

SM0

SMCR

Read/Write

RRRR

R/W

Initial Value

0000

Table 7-1.

Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

000

Idle

ADC Noise Reduction

010

Power-down

011

Power-save

100

Reserved

101

Reserved

110

Standby(1)

Extended Standby(1)

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