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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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56F8167 bảng dữ liệu(PDF) 16 Page - Freescale Semiconductor, Inc |
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56F8167 bảng dữ liệu(HTML) 16 Page - Freescale Semiconductor, Inc |
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16 / 182 page  56F8367 Technical Data, Rev. 9 16 Freescale Semiconductor Preliminary Figure 2-1 56F8367 Signals Identified by Functional Group1 (160-pin LQFP) 1. Alternate pin functionality is shown in parenthesis; pin direction/type shown is the default functionality. VDD_IO VDDA_OSC_PLL VDDA_ADC VSS VSSA_ADC Other Supply Ports External Address Bus or GPIO External Data Bus SCI 0 or GPIO SCI 1 or GPIOD 1 1 7 1 6 VPP1 & VPP2 2 Power Ground Power Ground A8 - A15 (GPIOA0 - 7) TXD0 (GPIOE0) RXD0 (GPIOE1) TXD1 (GPIOD6) RXD1 (GPIOD7) TCK TMS TDI TDO TRST Quadrature Decoder 0 or Quad Timer A PHASEA0 (TA0, GPIOC4) PHASEB0 (TA1, GPIOC5) INDEX0 (TA2, GPIOC6) HOME0 (TA3, GPIOC7) PHASEB1 (TB1, MOSI1, GPIOC1) INDEX1 (TB2, MISO1, GPIOC2) HOME1 (TB3, SS1, GPIOC3) PWMA0 - 5 ISA0 - 2 (GPIOC8 - 10) FAULTA0 - 3 ISB0 - 2 (GPIOD10 - 12) FAULTB0 - 3 PWMB0 - 5 ANA0 - 7 ANB0 - 7 VREF CAN_RX CAN_TX TC0 - 1 (GPIOE8 - 9) TD0 - 3 (GPIOE10 - 13) IRQA IRQB RESET RSTO SPI0 or GPIO PWMA Quadrature Decoder 1 or Quad Timer B or SPI 1 or GPIO PWMB ADCB ADCA FlexCAN Quad Timer C and D or GPIO INTERRUPT/ PROGRAM CONTROL PHASEA1(TB0, SCLK1, GPIOC0) 8 8 GPIOB0 - 7 (A16 - 23) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 6 3 4 6 3 4 8 5 8 1 1 1 2 4 1 1 1 1 1 56F8367 Temp_Sense *VCAP1 - VCAP4 4 A0 - A5 (GPIOA8 - 13) 6 A6 - A7 (GPIOE2 - 3) 2 RD 1 WR 1 PS/CS0 (GPIODF8) 1 DS/CS1 (GPIOFD9) 1 GPIOD0 (CS2, CAN2_TX) 1 JTAG/ EOnCE Port External Bus Control D7 - D15 (GPIOF0 - 8) 9 D0 - D6 (GPIOF9 - 15) 7 EXTBOOT MOSI0 (GPIOE5) MISO0 (GPIOE6) SS0 (GPIOE7) 1 1 1 SCLK0 1 1 EMI_MODE Power OCR_DIS 1 1 GPIOD2 - 5 (CS4 - 7) 4 GPIOD1 (CS3, CAN2_RX) Temperature Sense 1 GPIOB4 (A20, prescaler_clock) 1 GPIOB5 (A21, SYS_CLK) 1 GPIOB6 (A22, SYS_CLK2) 1 GPIOB7 (A23, oscillator_clock) PLL and Clock EXTAL XTAL CLKO 1 1 1 CLKMODE 1 * When the on-chip regulator is disabled, these four pins become 2.5V VDD_CORE. |
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