MB90F334APMC datasheet(26/72 Pages) FUJITSU

26 / 72 page

MB90330A Series

DS07-13734-7E

(Continued)

Address

abbreviation

Read/

Write

Resource name

Initial Value

000086H

TCDT

Timer Data Register Lower

R/W

16-bit Free-Run

Timer

0 0 0 0 0 0 0 0B

000087H

Timer Data Register Upper

R/W

0 0 0 0 0 0 0 0B

000088H

TCCS

Timer Control Status Register Lower

R/W

0 0 0 0 0 0 0 0B

000089H

Timer Control Status Register Upper

R/W

0 - - 0 0 0 0 0B

00008AH

CPCLR

Compare Clear Register Lower

R/W

XXXXXXXXB

00008BH

Compare Clear Register Upper

R/W

XXXXXXXXB

00008CH

00009AH

Prohibited

00009BH

DCSR

DMA Descriptor Channel

Specification Register

R/W

μDMAC

0 0 0 0 0 0 0 0B

00009CH

DSRL

DMA Status Register Lower

R/W

0 0 0 0 0 0 0 0B

00009DH

DSRH

DMA Status Register Upper

R/W

0 0 0 0 0 0 0 0B

00009EH

PACSR

Program Address Detection Control

Status Register

R/W

Address Match

Detection

0 0 0 0 0 0 0 0B

00009FH

DIRR

Delay Interruption Factor Generation/

Release Register

R/W

Delay Interrupt

- - - - - - - 0B

0000A0H

LPMCR

Low Power Consumption Mode

Control Register

R/W

Low Power

Consumption

Control Circuit

0 0 0 1 1 0 0 0B

0000A1H

CKSCR

Clock Selection Register

R/W

Clock

1 1 1 1 1 1 0 0B

0000A2H

Prohibited

0000A3H

0000A4H

DSSR

DMA Stop Status Register

R/W

μDMAC

0 0 0 0 0 0 0 0B

0000A5H

ARSR

Automatic Ready Function Selection

External Pin

0 0 1 1- - 0 0B

0000A6H

HACR

External Address Output Control

∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ B

0000A7H

EPCR

Bus Control Signal Selection Register

1 0 0 0

∗ 1 0 -B

0000A8H

WDTC

Watchdog Timer Control Register

R/W

Watchdog Timer

X - XXX 1 1 1B

0000A9H

TBTC

Time-base Timer Control Register

R/W

Time-base Timer

1 - - 0 0 1 0 0B

0000AAH

WTC

Watch Timer Control Register

R/W

Watch Timer

1 0 0 0 1 0 0 0B

0000ABH

Prohibited

0000ACH

DERL

DMA Enable Register Lower

R/W

μDMAC

0 0 0 0 0 0 0 0B

0000ADH

DERH

DMA Enable Register Upper

R/W

0 0 0 0 0 0 0 0B

0000AEH

FMCS

Flash Memory Control Status

R/W

Flash Memory

I/F

0 0 0 X 0 0 0 0B

0000AFH

Prohibited

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