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7733 bảng dữ liệu(PDF) 289 Page - Renesas Technology Corp

tên linh kiện 7733
Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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7733 bảng dữ liệu(HTML) 289 Page - Renesas Technology Corp

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A-D CONVERTER
7733 Group User’s Manual
9–24
A-D conversion is started.
Setting of the port P7 direction register
b7
b0
Port P7 direction register (address 11 16)
Set bits corresponding to selected
analog input pins to “0.”
When an external trigger is selected,
set bit 7 to “0.”
AN0
Trigger is generated.
Falling edges input to Pin
ADTRG
When external trigger is selected
When internal trigger is
selected
Setting of the A-D conversion start flag to “1”
b7
b0
A-D control register 0 (address 1E 16)
A-D conversion start flag
1
Setting of the A-D control registers 0, 1
b7
b0
A-D control register 0 (address 1E 16)
10
0
: It may be “0” or “1.”
f2: Refer to chapter “14. CLOCK GENERATING CIRCUIT.”
b7
b0
A-D control register 1 (address 1F 16)
A-D sweep pin selection bits
b1b0
0 0: AN0 and AN1 (2 pins)
0 1: AN0 to AN3 (4 pins)
1 0: AN0 to AN5 (6 pins)
1 1: AN0 to AN7 (8 pins)
Trigger selection bit
0: Internal trigger
1: External trigger
A-D conversion start flag
0: A-D conversion is stopped.
A-D conversion frequency (
AD
) selection flag
0: f2/4
1: f2/2
Selection of the single sweep mode
VREF connection selection bit
0: Pin VREF is connected.
0
Note: Writing to each bit (except bit 6) of the A-D control register 0 and each bit of the A-D
control register 1 must be performed while A-D converter stops operating, in
other words, before a trigger is generated.
When the VREF connection selection bit is cleared from “1” to “0,” wait for an
interval of 1 s or more passed, and then generate a trigger.
Setting of the interrupt priority level
b7
b0
A-D/UART2 trans./rece. interrupt control register (address 70 16)
Interrupt priority level selection bits
When using interrupts, one of levels 1 to 7 must be set.
When disabling interrupts, level 0 must be set.
AN5
AN1
AN2
AN3
AN4
8/10-bit mode selection bit
0: 8-bit resolution
1: 10-bit resolution
0
AN7
AN6
Fig. 9.7.1 Initial setting example for registers related to single sweep mode
9.7 Single sweep mode



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