7733 datasheet(217/940 Pages) RENESAS

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SERIAL I/O

7733 Group User’s Manual

8–14

Transmit data is set into the UARTi transmission buffer register.

When the microcomputer operates in the clock synchronous serial I/O mode or when 7-bit or 8-bit length

is selected as the transfer data’s length in the UART mode, the transmit data is set into the low-order byte

of this register. When 9-bit length is selected as the transfer data’s length in the UART mode, the transmit

data is set into the UARTi transmission buffer register as follows.

q Bit 8 of the transmit data is set into bit 0 of the high-order byte of the UARTi transmission buffer register.

q Bits 7 to 0 of the transmit data are set into the low-order byte of the UARTi transmission buffer register.

When transmit conditions are satisfied, the transmit data which is set in the UARTi transmission buffer

with the transfer clock. The UARTi transmission buffer register becomes empty when data which is set in

this register is transferred to the UARTi transmission register, so the next transmit data can be set.

When the “MSB first” is selected in the clock synchronous serial I/O mode, bit position of set data is

reversed, and then this data is written into the UARTi transmission buffer register as the transmit data.

(Refer to section “8.3.2 Transfer data format.”) Transmit operation itself is the same whichever format is

selected, “LSB first” or “MSB first.”

When quitting the transmission which is in progress and setting the UARTi transmission buffer register

again, follow the procedure described below.

Clear the serial I/O mode selection bits (bits 2 to 0 at addresses 3016, 3816 and 6416) to “0002.”

(Serial I/O is ignored.)

Set the serial I/O mode selection bits again.

Set the transmit enable bit (bit 0 at addresses 3516, 3D16 and 6916) to “1” (in other words, transmission

is enabled.) and set the transmit data into the UARTi transmission buffer register.

8.2 Block description

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