7733 datasheet(110/940 Pages) RENESAS

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KEY INPUT INTERRUPT FUNCTION

7733 Group User’s Manual

5–7

Setting of interrupt priority level

INT2/Key input interrupt control register (address 7F 16)

Interrupt priority level selection bits

One of levels 1 to 7 must be set.

Interrupt request bit

g In order to enable the key input interrupt, the interrupt disable flag (I) must be set to “0” and

the processor interrupt priority level (IPL) must be a value smaller than the INT2/key input

interrupt’s priority level. (Refer to chapter “4. INTERRUPTS.” )

Selection of the key input interrupt function

Pull-up selection for pins KI0 to KI3

Port function control register (address 6D 16)

0: No pull-up

1: Pull-up

Port P5 pull-up selection bit

0: Port P64 is a programmable I/O port with no pull-up.

1: Port P64 is an input pin with pull-up and is used for the key input

interrupt.

Port P6 pull-up selection bit 1

Setting of port P5 and P6 direction registers

Port P5 direction register (address D 16)

P54 to P57 are set to the input mode. (Must be set to “0000.”)

Port P6 direction register (address 10 16)

When setting P64 as an input pin for the key input interrupt, set this bit to “0.”

5.3 Initial setting example for related registers

Figure 5.3.1 shows an initial setting example for registers related to the key input interrupt function.

Fig. 5.3.1 Initial setting example for registers related to key input interrupt function

5.3 Initial setting example for related registers

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