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7733 bảng dữ liệu(PDF) 837 Page - Renesas Technology Corp |
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7733 bảng dữ liệu(HTML) 837 Page - Renesas Technology Corp |
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837 / 940 page ![]() KEY INPUT INTERRUPT FUNCTION 7736 Group User’s Manual 5–3 5.2 Block description Figure 5.2.1 shows the block diagram for the key input interrupt function. 5.2 Block description INT2 /Key input interrupt control register Interrupt control register P64/INT2 P107/KI3 P105/KI1 P106/KI2 P104/KI0 INT2/Key input interrupt request Key input interrupt selection bit (address 7F16) When key input interrupt is selected, it is necessary to select edge sense which uses falling edge. Pull–up transistor Port P10 pull-up selection bit Port P107 direction register 0 1 Pull–up transistor Pull–up transistor Pull–up transistor Port P6 pull-up selection bit 1 Port P64 direction register 0 1 Port P6 pull-up selection bit 1 Fig. 5.2.1 Block diagram for key input interrupt function ___ ___ ____ 5.2.1 Pins KI0 to KI3 and P64/INT2 When the key input interrupt function is selected, pins P104 to P107 become input pins for the key input ___ ___ interrupt (KI0 to KI3). When selecting the key input interrupt function, clear all of bits 4 to 7 at address 1816 (Port P10 direction register) to “0.” ___ ___ When bits 4 to 7 at address 1616 (Port P10 register) are read out, the status of pins KI0 to KI3 can be read ____ in. When using pin P64/INT2 as an input pin for the key input interrupt, set both of bits 5 and 7 at address 6D16 to “1” and bit 4 at address 1016 (Port P6 direction register) to “0.” When bit 4 at address E616 (Port ____ P6 register) is read out, the status of pin P64/INT2 can be read in. Fig. 5.2.2 Port P10 and P6 direction registers when key input interrupt function is selected b7 b6 b5 b4 b3 b2 b1 b0 Port P10 direction register (address 1816) 0 00 0 b7 b6 b5 b4 b3 b2 b1 b0 Port P6 direction register (address 1016) 0 0: Must be set to “0.” 0: Must be set to “0.” |
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