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7733 bảng dữ liệu(PDF) 753 Page - Renesas Technology Corp |
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7733 bảng dữ liệu(HTML) 753 Page - Renesas Technology Corp |
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753 / 940 page ![]() LOW VOLTAGE VERSION 7735 Group User’s Manual 18-5 18.4.6 Ready and Hold Timing requirements (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz (Note), unless otherwise noted) g The rise/fall time of an input signal must be 100 ns or less, unless otherwise noted. 18.4 Electrical characteristics Concerning section “18.4 Electrical characteristic,” the 7735 Group differs from the 7733 Group in the following sections: • “18.4.6 Ready and Hold” • “18.4.8 Memory expansion mode and Microprocessor mode : with no wait” • “18.4.9 Memory expansion mode and Microprocessor mode : with wait 1” • “18.4.10 Memory expansion mode and Microprocessor mode : with wait 0” The other description is the same as that of the 7733 Group. Therefore, refer to part 1: • “18.4 Electrical characteristics” (page 18-7 in part 1) 18.4 Electrical characteristics Limits tsu(RDY–φ1) tsu(HOLD–φ1) th(φ1–RDY) th(φ1–HOLD) Max. ns ns ns ns Min. Parameter Symbol Unit 80 80 0 0 ____ RDY input setup time _____ HOLD input setup time ____ RDY input hold time _____ HOLD input hold time Note: This is applied when the main clock division selection bit = “0” and f(f2) = 6 MHz. td(φ1–HLDA) ns Min. Max. 120 Limits Unit Conditions Parameter Symbol _____ HLDA output delay time Fig. 18.4.1 Switching characteristics (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz, unless otherwise noted) |
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