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7733 bảng dữ liệu(PDF) 728 Page - Renesas Technology Corp |
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7733 bảng dữ liệu(HTML) 728 Page - Renesas Technology Corp |
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728 / 940 page ![]() APPLICATIONS 7735 Group User’s Manual 17–2 17.1 Memory expansion Concerning chapter “17. APPLICATIONS,” the 7735 Group differs from the 7733 Group in the following sections. Therefore, only the differences are described in this chapter: • “17.1 Memory expansion” • “17.4 Power saving” The following sections of the 7735 Group are the same as those of the 7733 Group. Therefore, for these sections, refer to part 1: • “17.2 Serial I/O” (page 17-28 in part 1) • “17.3 Watchdog timer” (page 17-41 in part 1) • “17.5 Timer B” (page 17-54 in part 1) 17.1 Memory expansion Memory • I/O expansion examples of the M37735MHBXXXFP are described below. • For functions and operations of pins used in memory • I/O expansion, refer to chapter “12. CONNECTING EXTERNAL DEVICES.” • For timing characteristics, refer to chapter “15. ELECTRICAL CHARACTERISTICS.” 17.1.1 Memory expansion model Memory expansion to the external is available in the memory expansion or microprocessor mode. In the M37735MHBXXXFP, the desired memory expansion model can be selected from two models listed in Table 17.1.1. This selection depends on the level of the external data bus width selection signal (BYTE). (1) 8-bit external data bus model The external data bus is 8 bits wide and the accessible area can be expanded up to 1 Mbytes. The low-order 8 bits of the external address bus (A7 to A0) are multiplexed with the external data bus. Therefore, one 8-bit address latch is necessary in order to latch A7 to A0. (2) 16-bit external data bus model The external data bus is 16 bits wide and the accessible area can be expanded up to 1 Mbytes. The low-order 16 bits of the external address bus (A15 to A0) are multiplexed with the external data bus. Therefore, two 8-bit address latches are necessary in order to latch A7 to A0 and A15 to A8. |
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