7733 datasheet(573/940 Pages) RENESAS

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APPENDIX

7733 Group User’s Manual

21-25

Appendix 3. Control registers

sTimer mode

At reset

Un-

defined

Un-

defined

Bit

Bit name

Functions

Timer Bi mode register (i = 0 to 2) (addresses 5B16 to 5D16)

b1 b0

b4 b3

0 0: Clock f2

0 1: Clock f16

1 0: Clock f64

1 1: Clock f512

b7 b6

Count source selection bits

This bit is ignored in the timer mode and is undefined at reading.

Clocks f2, f16, f64, and f512: Refer to chapter “14. CLOCK GENERATING CIRCUIT.”

b0 b7

(b15)

(b8)

Timer B0 register (addresses 5116, 5016)

Timer B1 register (addresses 5316, 5216)

Timer B2 register (addresses 5516, 5416)

Functions

Bit

At reset

15 to 0 Values 000016 to FFFF16 can be set.

Assuming that the set value = n, counter

divides the count source frequency by (n + 1).

At reading this register, the counter value is

read out.

Un-

defined

These bits are ignored in the timer mode.

Operating mode selection bits

0 0: Timer mode

•Timer B0 mode register

Must be fixed to “0.”

•Timer B1 and B2 mode registers

Not implemented.

—

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