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SH7721 bảng dữ liệu(PDF) 388 Page - Renesas Technology Corp

tên linh kiện SH7721
Giải thích chi tiết về linh kiện  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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Section 9
Bus State Controller (BSC)
Rev. 3.00 Jan. 18, 2008 Page 326 of 1458
REJ09B0033-0300
Bit
Bit Name
Initial
Value
R/W
Description
12
0
R
Reserved
This bit is always read as 0. The write value should always
be 0.
11
RFSH
0
R/W
Refresh Control
Specifies whether or not the refresh operation of the SDRAM
is performed.
0: No refresh
1: Refresh
10
RMODE
0
R/W
Refresh Control
Specifies whether to perform auto-refresh or self-refresh
when the RFSH bit is 1. When the RFSH bit is 1 and this bit
is 1, self-refresh starts immediately. When the RFSH bit is 1
and this bit is 0, auto-refresh starts according to the contents
that are set in RTCSR, RTCNT, and RTCOR.
0: Auto-refresh is performed
1: Self-refresh is performed
9
PDOWN
0
R
Power-Down Mode
Specifies whether the SDRAM is entered in power-down
mode or not after the access to SDRAM is completed. If this
bit is set to 1, the CKE pin is pulled to low to place the
SDRAM to power-down mode.
0: Does not place the SDRAM in power-down mode after
access completion.
1: Places the SDRAM in power-down mode after access
completion.



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