SH7052 datasheet(273/919 Pages) RENESAS

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• Bit 8—Input Capture/Compare-Match Flag 4D (IMF4D): Status flag that indicates GR4D

input capture or compare-match.

Bit 8: IMF4D

Description

[Clearing condition]

(Initial value)

When IMF4D is read while set to 1, then 0 is written to IMF4D

[Setting conditions]

• When the TCNT4 value is transferred to GR4D by an input capture signal

while GR4D is functioning as an input capture register

•••• When TCNT4 = GR4D while GR4D is functioning as an output compare

•••• When TCNT4 = GR4D while GR4D is functioning as a PWM mode

synchronous register

• Bit 7—Input Capture/Compare-Match Flag 4C (IMF4C): Status flag that indicates GR4C input

capture or compare-match. The flag is not set in PWM mode.

Bit 7: IMF4C

Description

[Clearing condition]

(Initial value)

When IMF4C is read while set to 1, then 0 is written to IMF4C

[Setting conditions]

• When the TCNT4 value is transferred to GR4C by an input capture signal

while GR4C is functioning as an input capture register

•••• When TCNT4 = GR4C while GR4C is functioning as an output compare

• Bit 6—Input Capture/Compare-Match Flag 4B (IMF4B): Status flag that indicates GR4B input

capture or compare-match. The flag is not set in PWM mode.

Bit 6: IMF4B

Description

[Clearing condition]

(Initial value)

When IMF4B is read while set to 1, then 0 is written to IMF4B

[Setting conditions]

• When the TCNT4 value is transferred to GR4B by an input capture signal

while GR4B is functioning as an input capture register

•••• When TCNT4 = GR4B while GR4B is functioning as an output compare

SH7052 bảng dữ liệu(PDF) 273 Page - Renesas Technology Corp