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SH7052 bảng dữ liệu(PDF) 177 Page - Renesas Technology Corp

tên linh kiện SH7052
Giải thích chi tiết về linh kiện  SuperHTM RISC engine
PDF  919 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 bảng dữ liệu(HTML) 177 Page - Renesas Technology Corp

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151
• Bit 1—NMI Flag (NMIF): Indicates input of an NMI. This bit is set irrespective of whether the
DMAC is operating or suspended. If this bit is set during a data transfer, transfers on all
channels are suspended. The CPU is unable to write a 1 to the NMIF. Clearing is effected by a
0 write after a 1 read.
Bit 1: NMIF
Description
0
No NMI interrupt, DMA transfer enabled
(Initial value)
[Clearing condition]
Write NMIF = 0 after reading NMIF = 1
1
NMI has occurred, DMC transfer disabled
[Setting condition]
NMI interrupt occurrence
• Bit 0—DMAC Master Enable (DME): This bit enables activation of the entire DMAC. When
the DME bit and DE bit of the CHCR register for the corresponding channel are set to 1, that
channel is transfer-enabled. If this bit is cleared during a data transfer, transfers on all channels
are suspended.
Even when the DME bit is set, when the TE bit of CHCR is 1, or its DE bit is 0, transfer is
disabled if the NMIF or AE bit in DMAOR is set to 1.
Bit 0: DME
Description
0
Operation disabled on all channels
(Initial value)
1
Operation enabled on all channels



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