SH7052 datasheet(479/919 Pages) RENESAS

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• Bit 6—Receive Data Register Full (RDRF): Indicates that RDR contains received data.

Bit 6: RDRF

Description

RDR does not contain valid receive data

(Initial value)

[Clearing conditions]

• Power-on reset, hardware standby mode, or software standby mode

• When 0 is written to RDRF after reading RDRF = 1

• When the DMAC reads data from RDR

RDR contains valid received data

[Setting condition]

RDRF is set to 1 when serial data is received normally and transferred from RSR

to RDR

Note:

RDR and RDRF are not affected by detection of receive errors or by clearing of the RE bit

to 0 in the serial control register. They retain their previous contents. If RDRF is still set to 1

when reception of the next data ends, an overrun error (ORER) occurs and the receive data

is lost.

• Bit 5—Overrun Error (ORER): Indicates that data reception ended abnormally due to an

overrun error.

Bit 5: ORER

Description

Receiving is in progress or has ended normally

(Initial value)

Clearing the RE bit to 0 in the serial control register does not affect the ORER bit,

which retains its previous value.

[Clearing conditions]

• Power-on reset, hardware standby mode, or software standby mode

• When 0 is written to ORER after reading ORER = 1

A receive overrun error occurred

RDR continues to hold the data received before the overrun error, so subsequent

receive data is lost. Serial receiving cannot continue while ORER is set to 1. In

synchronous mode, serial transmitting is disabled.

[Setting condition]

ORER is set to 1 if reception of the next serial data ends when RDRF is set to 1

SH7052 bảng dữ liệu(PDF) 479 Page - Renesas Technology Corp