M16CSLASH1N datasheet(124/238 Pages) RENESAS

124 / 238 page

Rev.1.00

Oct 20, 2004

page 112 of 222

M16C/1N Group

13. Serial I/O

REJ09B0007-0100Z

b5 b4

UARTi transmit/receive control register 1

Transmit enable bit

0 : Transmission disabled

1 : Transmission enabled

0 : Transmission disabled

1 : Transmission enabled

Transmit buffer

empty flag

Receive enable bit

(Note 1)

0 : Reception disabled

1 : Reception enabled

0 : Reception disabled

1 : Reception enabled

Nothing is assigned.

In an attempt to write to these bits, write "0". The value, if read, turns out to be "0".

Receive complete flag

Symbol

UiC1(i=0,1)

Address

00A516, 00AD16

When reset

XXXX00102

Function

(During clock synchronous serial I/O mode)

Function

(During UART mode)

Bit name

Bit

symbol

b5 b4

UART transmit/receive control register 2

Symbol

UCON

Address

00B016

When reset

0016

Function

(During clock synchronous serial I/O mode)

Function

(During UART mode)

Bit name

Bit

symbol

Note 1: As for the UART1, set the RXD1 input port select bit before setting this bit to reception enabled.

0 : Data present in transmit

buffer register

1 : No data present in

transmit buffer register

0 : No data present in

receive buffer register

1 : Data present in receive

buffer register

0 : Data present in transmit

buffer register

1 : No data present in

transmit buffer register

U0IRS

UART0 transmit

interrupt cause select bit

0 : Transmit buffer empty

(Tl = 1)

1 : Transmission completed

(TXEPT = 1)

0 : Transmit buffer empty

(Tl = 1)

1 : Transmission completed

(TXEPT = 1)

U1IRS

UART1 transmit

interrupt cause select bit

0 : Transmit buffer empty

(Tl = 1)

1 : Transmission completed

(TXEPT = 1)

U0RRM

Invalid

UART0 continuous

receive mode enable bit

0 : Continuous receive

mode disabled

1 : Continuous receive

mode enable

CLKMD1

Set to "0"

CLK/CLKS select

bit 1 (Note 1)

0 : Normal mode

(CLK output is CLK0 only)

1 : Transfer clock output

from multiple pins

function selected

U1RRM

Invalid

UART1 continuous

receive mode enable bit

CLKMD0

Invalid

CLK/CLKS select bit 0

Valid when bit 5 = "1"

0 : Clock output to CLK1

1 : Clock output to CLKS1

RXD1EN

Nothing is assigned.

In an attempt to write to these bits, write "0". The value, if read, turns out to be "0".

RXD1 input port

select bit (Note 2)

0 : P37

1 : P35

0 : P37

1 : P35

0 : Continuous receive

mode disabled

1 : Continuous receive

mode enable

0 : Transmit buffer empty

(Tl = 1)

1 : Transmission completed

(TXEPT = 1)

0 : No data present in

receive buffer register

1 : Data present in receive

buffer register

Note 1: When using multiple pins to output the transfer clock, the following requirements must be met:

UART1 internal/external clock select bit (bit 3 at address 00A816) = "0".

Note 2: For P37, select "0" for data receive, and "1" for data transfer.

And set the direction register of port P37 to input ("0") when receiving.

Figure 13.5 Serial I/O-related registers (3)

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