M16CSLASH1N datasheet(74/238 Pages) RENESAS

74 / 238 page

Rev.1.00

Oct 20, 2004

page 62 of 222

M16C/1N Group

10. Interrupt

REJ09B0007-0100Z

10.3 CNTR0 Interrupt

A CNTR0 interrupt is generated from the selected edge polarity, a rising or a falling edge, of the CNTR0

input signal. The edge polarity is selected using the CNTR0 polarity select bit (bit 2 at address 008B16).

When using the CNTR0 interrupt, the port P17 direction register should be set to input.

When the pulse output mode of timer X is selected, the CNTR0 pin functions as a pulse output pin. In this

case, a CNTR0 interrupt occurs by a falling or rising edge output from the CNTR0 pin. The port P17

direction register should else be set to input at this time.

Figure 10.12 shows the timer X mode register.

Note 1: In the pulse output mode, the direction register of port P17 should be set to input.

Note 2: This bit should rewrite with inhibiting the CNTR0 interrupt. To use all interrupt, enable an interrupt after the CNTR0

interrupt request bit is cleared with the MOV instruction.

Note 3: Nothing is assigned to the pod probe for M16C/1N group (M301N2T-PRB).

b5 b4

Timer X mode register

TXMOD0

TXMOD1

Operation mode

select bit 0, 1

(Note 2)

R0EDG

CNTR0 polarity

switching bit (Note 2)

TXS

Timer X count

start flag

0 : Stops counting

1 : Starts counting

0 : Rising edge

1 : Falling edge

TXOCNT

P30/TXOUT

select bit

Function varies with each operation mode

TXMOD2

Operation mode

select bit 2

0 : Except in pulse period measurement mode

1 : Pulse period measurement mode

TXEDG

Effectual edge

reception flag (Note 3)

Function varies with each operation mode

TXUND

Timer X under flow

flag (Note 3)

Function varies with each operation mode

Symbol

TXMR

Address

008B16

When reset

0016

Function

Bit name

Bit symbol

b1 b0

0 0 : Timer mode or

pulse period measurement mode

0 1 : Pulse output mode (Note 1)

1 0 : Event counter mode

1 1 : Pulse width measurement mode

Figure 10.12 Timer X mode register

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