M16CSLASH1N datasheet(120/238 Pages) RENESAS

120 / 238 page

Rev.1.00

Oct 20, 2004

page 108 of 222

M16C/1N Group

13. Serial I/O

REJ09B0007-0100Z

Bit rate generator

(Address 00A116)

Clock synchronous type

(when internal clock is selected)

UART reception

Clock synchronous type

UART transmission

Clock synchronous type

(when internal clock is selected)

Clock synchronous type

(when external clock is selected)

Receive

clock

Transmit

clock

Receive

clock

Transmit

clock

Clock source selection

Internal

External

Bit rate generator

(Address 00A916)

Clock source selection

n0: Values set to UART0 bit rate generator (BRG0)

n1: Values set to UART1 bit rate generator (BRG1)

Clock output pin

select switch

RxD0

1 / (n0+1)

1 / (n1+1)

1/16

1/2

CLK0

TxD0

RxD1

1/16

1/2

CLK1

TxD1

(UART1)

(UART0)

CLKS1

Reception

control circuit

Transmission

control circuit

Transmit/

receive

unit

CLK

polarity

reversing

circuit

Transmit/

receive

unit

Reception

control circuit

Transmission

control circuit

Clock synchronous type

(when internal clock is selected)

Clock synchronous type

(when external clock is selected)

UART reception

Clock synchronous type

UART transmission

Clock synchronous type

(when internal clock is selected)

Internal

External

CLK

polarity

reversing

circuit

f32

13. Serial I/O

Serial I/O is configured as two channels: UART0 and UART1. UART0 and UART1 each have an exclusive

timer to generate a transfer clock, so they operate independently of each other.

Figure 13.1 shows the block diagram of UARTi (i=0,1). Figure 13.2 shows the block diagram of the transmit/

receive unit.

UART0 has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous serial I/

O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses 00A016 and

00A816) determine whether UART0 is used as a clock synchronous serial I/O or as a UART. Although a few

functions are different, UART0 and UART1 have almost the same functions.

Figures 13.3 through 13.5 show the registers related to UARTi.

Figure 13.1 Block diagram of UARTi (i= 0, 1)

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