HD64F3664FP datasheet(73/444 Pages) RENESAS

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Section 2 CPU

Rev. 6.00 Mar. 24, 2006 Page 45 of 412

REJ09B0142-0600

2.8.3

Bit Manipulation Instruction

The BSET, BCLR, BNOT, BST, and BIST instructions read data from the specified address in

byte units, manipulate the data of the target bit, and write data to the same address again in byte

units. Special care is required when using these instructions in cases where two registers are

assigned to the same address or when a bit is directly manipulated for a port, because this may

rewrite data of a bit other than the bit to be manipulated.

(1) Bit manipulation for two registers assigned to the same address

Example 1: Bit manipulation for the timer load register and timer counter

(Applicable for timer B and timer C, not for the group of this LSI.)

Figure 2.13 shows an example of a timer in which two timer registers are assigned to the same

address. When a bit manipulation instruction accesses the timer load register and timer counter of

a reloadable timer, since these two registers share the same address, the following operations takes

place.

1. Data is read in byte units.

2. The CPU sets or resets the bit to be manipulated with the bit manipulation instruction.

3. The written data is written again in byte units to the timer load register.

The timer is counting, so the value read is not necessarily the same as the value in the timer load

modified value may be written to the timer load register.

Read

Write

Count clock

Timer counter

Timer load register

Reload

Internal bus

Figure 2.13 Example of Timer Configuration with Two Registers Allocated to Same

Address

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