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HD64F3664FP bảng dữ liệu(PDF) 71 Page - Renesas Technology Corp |
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HD64F3664FP bảng dữ liệu(HTML) 71 Page - Renesas Technology Corp |
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71 / 444 page ![]() Section 2 CPU Rev. 6.00 Mar. 24, 2006 Page 43 of 412 REJ09B0142-0600 2.7 CPU States There are four CPU states: the reset state, program execution state, program halt state, and exception-handling state. The program execution state includes active mode and subactive mode. In the program halt state there are a sleep mode, standby mode, and sub-sleep mode. These states are shown in figure 2.11. Figure 2.12 shows the state transitions. For details on program execution state and program halt state, refer to section 6, Power-Down Modes. For details on exception processing, refer to section 3, Exception Handling. CPU state Reset state Program execution state Program halt state Exception- handling state Active (high speed) mode Subactive mode Sleep mode Subsleep mode Power-down modes The CPU executes successive program instructions at high speed, synchronized by the system clock The CPU executes successive program instructions at reduced speed, synchronized by the subclock A state in which some or all of the chip functions are stopped to conserve power A transient state in which the CPU changes the processing flow due to a reset or an interrupt The CPU is initialized Standby mode Figure 2.11 CPU Operation States |
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