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H8S2245 bảng dữ liệu(PDF) 599 Page - Renesas Technology Corp |
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H8S2245 bảng dữ liệu(HTML) 599 Page - Renesas Technology Corp |
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599 / 818 page ![]() Section 18 Power-Down Modes Rev.3.00 Mar. 26, 2007 Page 557 of 772 REJ09B0355-0300 18.2 Register Descriptions 18.2.1 Standby Control Register (SBYCR) 7 SSBY 0 R/W 6 STS2 0 R/W 5 STS1 0 R/W 4 STS0 0 R/W 3 OPE 1 R/W 0 — 0 — 2 — 0 — 1 — 0 — Bit Initial value R/W : : : SBYCR is an 8-bit readable/writable register that performs software standby mode control. SBYCR is initialized to H'08 by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 7—Software Standby (SSBY): Specifies a transition to software standby mode. Remains set to 1 when software standby mode is released by an external interrupt, and a transition is made to normal operation. The SSBY bit should be cleared by writing 0 to it. Bit 7 SSBY Description 0 Transition to sleep mode after execution of SLEEP instruction (Initial value) 1 Transition to software standby mode after execution of SLEEP instruction Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the time the MCU waits for the clock to stabilize when software standby mode is cleared by an external interrupt. With crystal oscillation, refer to table 18.4 and make a selection according to the operating frequency so that the standby time is at least 8 ms (the oscillation stabilization time). With an external clock, any selection can be made. |
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