H8S2245 datasheet(456/818 Pages) RENESAS

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Section 12 Serial Communication Interface (SCI)

Rev.3.00 Mar. 26, 2007 Page 414 of 772

REJ09B0355-0300

Bit 6—Receive Interrupt Enable (RIE): Enables or disables receive data full interrupt (RXI)

request and receive error interrupt (ERI) request generation when serial receive data is transferred

from RSR to RDR and the RDRF flag in SSR is set to 1.

Bit 6

RIE

Description

Receive data full interrupt (RXI) request and receive error interrupt (ERI) request

disabled*

(Initial value)

Receive data full interrupt (RXI) request and receive error interrupt (ERI) request

enabled

Note:

RXI and ERI interrupt request cancellation can be performed by reading 1 from the

RDRF flag, or the FER, PER, or ORER flag, then clearing the flag to 0, or clearing the

RIE bit to 0.

Bit 5—Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.

Bit 5

Description

Transmission disabled*

(Initial value)

Transmission enabled*

Notes: 1. The TDRE flag in SSR is fixed at 1.

2. In this state, serial transmission is started when transmit data is written to TDR and the

TDRE flag in SSR is cleared to 0.

SMR setting must be performed to decide the transfer format before setting the TE bit

to 1.

Bit 4—Receive Enable (RE): Enables or disables the start of serial reception by the SCI.

Bit 4

Description

Reception disabled*

(Initial value)

Reception enabled*

Notes: 1. Clearing the RE bit to 0 does not affect the RDRF, FER, PER, and ORER flags, which

retain their states.

2. Serial reception is started in this state when a start bit is detected in asynchronous

mode or serial clock input is detected in clocked synchronous mode.

SMR setting must be performed to decide the transfer format before setting the RE bit

to 1.

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