H8S2245 datasheet(349/818 Pages) RENESAS

tên linh kiện	H8S2245

Giải thích chi tiết về linh kiện	Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series

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Section 9 16-Bit Timer Pulse Unit (TPU)

Rev.3.00 Mar. 26, 2007 Page 307 of 772

REJ09B0355-0300

9.2.4

Timer Interrupt Enable Register (TIER)

TTGE

R/W

—

TCIEV

R/W

TGIED

R/W

TGIEA

R/W

TGIEC

R/W

TGIEB

R/W

Bit

Initial value

R/W

Channel 0: TIER0

TTGE

R/W

—

TCIEU

R/W

TCIEV

R/W

—

TGIEA

R/W

—

TGIEB

R/W

Channel 1: TIER1

Channel 2: TIER2

Bit

Initial value

R/W

The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for

each channel. The TPU has three TIER registers, one for each channel. The TIER registers are

initialized to H'40 by a reset, and in hardware standby mode.

Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D

conversion start requests by TGRA input capture/compare match.

Bit 7

TTGE

Description

A/D conversion start request generation disabled

(Initial value)

A/D conversion start request generation enabled

Bit 6—Reserved: Read-only bit, always read as 1.

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