M32C83T datasheet(108/527 Pages) RENESAS

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Page 85

8. Clock Generation Circuit

)

(

(7) The oscillation stop detect function is used, set the CM20 bit in the CM2 register to "0" (oscilla

tion stop detect function disabled)

(8) Set the I flag to "1"

(9) Set the CM10 bit to "1" (all clocks stops)

• After Exiting Stop Mode

Set the interrupt priority level required to exit stop mode to "7" immediately after exiting stop mode.

8.5.3.2 Exiting Stop Mode

_______

Stop mode is exited by the hardware reset, NMI interrupt, or peripheral function interrupts (key input

______

interrupt and INT interrupt).

_______

When the hardware reset or NMI interrupt, but not the peripheral function interrupts, is used to exit wait

mode, set all ILVL2 to ILVL0 bits in the interrupt control registers for the peripheral function interrupt to

"0002" (interrupt disabled) before setting the CM10 bit to "1" (all clocks stops).

8.5.3.3 Pin Status in Stop Mode

Table 8.8 lists pin status in stop mode.

Table 8.8 Pin Status in Stop Mode

Memory Expansion Mode

Single-Chip Mode

Microprocessor Mode(2)

_______

Address Bus, Data Bus, CS0 to CS3, BHE

Maintains state immediately before

entering stop mode

_____

______

________

_________

______

_________

________

RD, WR, WRL, WRH, DW, CASL, CASH

"H" (1)

________

RAS

"H" (1)

__________

HLDA, BCLK

"H"

ALE

"H"

Port

Maintains state immediately before entering stop mode

CLKOUT

When fC selected

"H"

When f8, f32 selected

Maintains state immediately before entering stop mode

XIN

High-impedance

XOUT

"H"

XCIN, XCOUT

High-impedance

NOTES:

________

1. When performing a self-refresh operation using DRAMC, CAS and RAS become low ("L").

2. M32C/83T cannot be used in memory expansion mode and microprocessor mode.

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