STPCELITE datasheet(12/87 Pages) STMICROELECTRONICS

12 / 87 page

PIN DESCRIPTION

12/87

Release 1.3 - January 29, 2002

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Table 2-2. Definition of Signal Pins

Signal Name

Dir

Buffer Type2

Description

Qty

BASIC CLOCKS AND RESETS

SYSRSETI#

SCHMITT_FT

System Power Good Input

SYSRSTO#

BD8STRP_FT

System Reset Output

XTALI

ANA

14.3 MHz Crystal Input - External

Oscillator Input

XTALO

I/O

OSCI13B

14.3 MHz Crystal Output

HCLK

I/O

BD4STRP_FT

Host Clock (Test)

GP_CLK

BT8TRP_TC

General Purpose Clock

VDD_xxx_PLL

Power Supply for PLL Clocks

MEMORY INTERFACE

MCLKI

TLCHT_TC

Memory Clock Input

MCLKO

BT8TRP_TC

Memory Clock Output

CS#[1:0]

BD8STRP_TC

DIMM Chip Select

CS#[3]/MA[13]/BA[1]

BD16STARUQP_TC

DIMM Chip Select/ Memory Address/

Bank Address

CS#[2]/MA[12]

BD16STARUQP_TC DIMM Chip Select/ Bank Address

MA[10:0]

BD16STARUQP_TC Memory Row & Column Address

MD[48:10], [7:2]

I/O

BD8TRP_TC

Memory Data

MD[63:49], [9:8], [1:0]

I/O

BD8STRUP_FT

Memory Data

RAS#[1:0]

BD16STARUQP_TC Row Address Strobe

CAS#[1:0]

BD16STARUQP_TC Column Address Strobe

MWE#

BD16STARUQP_TC Write Enable

DQM[7:0]

BD8STRP_TC

Data Input/Output Mask

PCI INTERFACE

PCI_CLKI

TLCHT_FT

33 MHz PCI Input Clock

PCI_CLKO

BT8TRP_TC

33 MHz PCI Output Clock (from internal

PLL)

AD[31:0]

I/O

BD8PCIARP_FT

PCI Address / Data

CBE[3:0]

I/O

BD8PCIARP_FT

Bus Commands / Byte Enables

FRAME#

I/O

BD8PCIARP_FT

Cycle Frame

IRDY#

I/O

BD8PCIARP_FT

Initiator Ready

TRDY#

I/O

BD8PCIARP_FT

Target Ready

LOCK#

TLCHT_FT

PCI Lock

DEVSEL#

I/O

BD8PCIARP_FT

Device Select

STOP#

I/O

BD8PCIARP_FT

Stop Transaction

PAR

I/O

BD8PCIARP_FT

Parity Signal Transactions

SERR#

BD8PCIARP_FT

System Error

PCI_REQ#[2:0]

BD8PCIARP_FT

PCI Request

PCI_GNT#[2:0]

BD8PCIARP_FT

PCI Grant

PCI_INT[3:0]

BD4STRUP_FT

PCI Interrupt Request

ISA CONTROL

Note1: These pins must be connected to the 2.5 V power supply. They must not be connected to the 3.3V supply.

Note2: See Table 2-3 for buffer type descriptions.

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