SABRE-LL-I datasheet(39/141 Pages) STMICROELECTRONICS

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SABRE-LL-I

Main switching regulator

39/141

12.2

Pulse skipping operation

Pulse skipping is a well known, non linear, control strategy used in switching regulators.

In this technique (see Figure 9) the feedback comparator output is sampled at the beginning

of each switching cycle. At this time, if the sampled value shows that output voltage is lower

than requested one, the complete PWM duty cycle is applied to power switch; otherwise no

PWM is applied and the switching cycle is skipped. Once PWM is applied to power element

only a current limit event can disable the power switch before the whole duty cycle is

finished.

Figure 9.

Main switching regulator functional blocks

In pulse skipping control the duty cycle must be chosen by the user depending on supply

voltage and output regulated voltage. Therefore the switching regulator has 4 possible duty

cycles that can be changed by writing the VmainSwSelPWM bits in the MainSwCfg register

according to following table.

Adjustable duty cycles can be changed by a metal layer change in order to adapt it to

customer system. The only limitation is that all regulators share the same duty cycle bus, so

any modification must consider all regulators duty cycles.

Table 19.

Main switching regulator PWM specification

MainSwCfg register

Duty cycle value

Comments

VmainSwSelPWM[1:0]

Typical

12%

15%

26%

Default state

63.5%

VSupply

High Side

Driver

Control

Logic

Current Sense

Charge pump Voltage

VSWmain_FB

Voltage

Loop Control

Regulator Ref

Under voltage

Threshold

Filter

From Central Logic

Regulator Freq

To Central Logic

Under voltage flag

VSWmain_SW

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