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SABRE-LL-I bảng dữ liệu(PDF) 96 Page - STMicroelectronics |
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SABRE-LL-I bảng dữ liệu(HTML) 96 Page - STMicroelectronics |
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96 / 141 page ![]() GPIO pins SABRE-LL-I 96/141 Hereafter are reported the detailed specifications for each GPIO. To enable the functionality of the GPIO as output pin, the relative GpioOutEnable[14:0] bit must be enabled in GpioOutEnable register. Each GPIO could be configured by setting the appropriate GpioXMode[2:0] in the GpioCtrlX register. Reg. Loop 2 This pin can be used as output of the regulation loop used by AUX2 regulator. Comp2 OUT This pin can be used as output of the comparator 2. AuxPwm2 This pin can be used to carry out the PWM generated by AuxPwm2 circuit. Low Volt. Pow. Sw. 2 This pin can be used as output of low voltage power switch 2. Reg. Loop 3 This pin can be used as output of the regulation loop used by AUX3 regulator. AuxPwm3 This pin can be used to carry out the PWM generated by AuxPwm3 circuit. CurrDAC This pin can be used to carry out the output of the current DAC circuit. AuxPwm4 This pin can be used to carry out the PWM generated by AuxPwm4 circuit. OpAmp1 in+ This pin can be used as operational amplifier 1 non-inverting input. OpAmp1 in- This pin can be used as operational amplifier 1 inverting input. OpAmp1 Out This pin can be used as operational amplifier 1 output. OpAmp2 in+ This pin can be used as operational amplifier 2 non-inverting input. OpAmp2 in- This pin can be used as operational amplifier 2 inverting input. OpAmp2 Out This pin can be used as operational amplifier 2 output. ID 1 This pin is used to determine the SPI ID1 bit value. ID 2 This pin is used to determine the SPI ID2 bit value. Slave Control This pin is used as slave control when the IC is configured as master. Table 68. Abbreviations (continued) Abbreviation Meaning |
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