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ECP2 bảng dữ liệu(PDF) 86 Page - Lattice Semiconductor |
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ECP2 bảng dữ liệu(HTML) 86 Page - Lattice Semiconductor |
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86 / 386 page ![]() 3-34 DC and Switching Characteristics Lattice Semiconductor LatticeECP2/M Family Data Sheet LVCMOS25_4mA LVCMOS 2.5 4mA drive, slow slew rate 2.18 2.26 2.33 ns LVCMOS25_8mA LVCMOS 2.5 8mA drive, slow slew rate 2.19 2.35 2.51 ns LVCMOS25_12mA LVCMOS 2.5 12mA drive, slow slew rate 1.50 1.66 1.82 ns LVCMOS25_16mA LVCMOS 2.5 16mA drive, slow slew rate 1.60 1.59 1.58 ns LVCMOS25_20mA LVCMOS 2.5 20mA drive, slow slew rate 1.43 1.39 1.34 ns LVCMOS18_4mA LVCMOS 1.8 4mA drive, slow slew rate 2.22 2.27 2.32 ns LVCMOS18_8mA LVCMOS 1.8 8mA drive, slow slew rate 1.93 2.08 2.23 ns LVCMOS18_12mA LVCMOS 1.8 12mA drive, slow slew rate 1.43 1.51 1.58 ns LVCMOS18_16mA LVCMOS 1.8 16mA drive, slow slew rate 1.47 1.46 1.45 ns LVCMOS15_4mA LVCMOS 1.5 4mA drive, slow slew rate 2.32 2.38 2.43 ns LVCMOS15_8mA LVCMOS 1.5 8mA drive, slow slew rate 1.84 1.98 2.12 ns LVCMOS12_2mA LVCMOS 1.2 2mA drive, slow slew rate 2.52 2.63 2.74 ns LVCMOS12_6mA LVCMOS 1.2 6mA drive, slow slew rate 1.69 1.83 1.96 ns PCI33 PCI33 0.04 0.04 0.04 ns 1. Timing Adders are characterized but not tested on every device. 2. LVCMOS timing measured with the load specified in Switching Test Condition table. 3. All other standards tested according to the appropriate specifications. 4. These timing adders are measured with the recommended resistor values. Timing v.A 0.11 LatticeECP2/M Family Timing Adders 1, 2, 3 (Continued) Over Recommended Operating Conditions Buffer Type Description -7 -6 -5 Units |
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