C167CS datasheet(118/517 Pages) INFINEON

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C167CS

Derivatives

Interrupt and Trap Functions

User’s Manual

5-35

V2.0, 2000-07

Protection Fault Trap

Whenever one of the special protected instructions is executed where the opcode of that

instruction is not repeated twice in the second word of the instruction and the byte

following the opcode is not the complement of the opcode, the PRTFLT flag in register

TFR is set and the CPU enters the protection fault trap routine. The protected

instructions include DISWDT, EINIT, IDLE, PWRDN, SRST, and SRVWDT. The IP value

pushed onto the system stack for the protection fault trap is the address of the instruction

that caused the trap.

Illegal Word Operand Access Trap

Whenever a word operand read or write access is attempted to an odd byte address, the

ILLOPA flag in register TFR is set and the CPU enters the illegal word operand access

trap routine. The IP value pushed onto the system stack is the address of the instruction

following the one which caused the trap.

Illegal Instruction Access Trap

Whenever a branch is made to an odd byte address, the ILLINA flag in register TFR is

set and the CPU enters the illegal instruction access trap routine. The IP value pushed

onto the system stack is the illegal odd target address of the branch instruction.

Illegal External Bus Access Trap

Whenever the CPU requests an external instruction fetch, data read or data write, and

no external bus configuration has been specified, the ILLBUS flag in register TFR is set

and the CPU enters the illegal bus access trap routine. The IP value pushed onto the

system stack is the address of the instruction following the one which caused the trap.

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