C167CS datasheet(43/517 Pages) INFINEON

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C167CS

Derivatives

Memory Organization

User’s Manual

3-6

V2.0, 2000-07

General Purpose Registers

The General Purpose Registers (GPRs) use a block of 16 consecutive words within the

internal RAM. The Context Pointer (CP) register determines the base address of the

currently active register bank. This register bank may consist of up to 16 Word-GPRs

(R0, R1, … R15) and/or of up to 16 Byte-GPRs (RL0, RH0, … RL7, RH7). The sixteen

Byte-GPRs are mapped onto the first eight Word-GPRs (see Table 3-2).

In contrast to the system stack, a register bank grows from lower towards higher address

locations and occupies a maximum space of 32 Byte. The GPRs are accessed via short

2-, 4-, or 8-bit addressing modes using the Context Pointer (CP) register as base

address (independent of the current DPP register contents). Additionally, each bit in the

currently active register bank can be accessed individually.

The C167CS supports fast register bank (context) switching. Multiple register banks can

physically exist within the internal RAM at the same time. Only the register bank selected

by the Context Pointer register (CP) is active at a given time, however. Selecting a new

active register bank is simply done by updating the CP register. A particular Switch

Context (SCXT) instruction performs register bank switching and an automatic saving of

Table 3-2

Mapping of General Purpose Registers to RAM Addresses

Internal RAM Address

Byte Registers

Word Register

<CP> + 1EH

–R15

<CP> + 1CH

–R14

<CP> + 1AH

–R13

<CP> + 18H

–R12

<CP> + 16H

–R11

<CP> + 14H

–R10

<CP> + 12H

–R9

<CP> + 10H

–R8

<CP> + 0EH

RH7

RL7

<CP> + 0CH

RH6

RL6

<CP> + 0AH

RH5

RL5

<CP> + 08H

RH4

RL4

<CP> + 06H

RH3

RL3

<CP> + 04H

RH2

RL2

<CP> + 02H

RH1

RL1

<CP> + 00H

RH0

RL0

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