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NRF52811-QCAA-R7 bảng dữ liệu(PDF) 124 Page - Nordic Semiconductor

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Peripherals
The tasks and events are configured using the CONFIG[n] registers. Every set of SET, CLR and OUT[n] tasks
and IN[n] events has one CONFIG[n] register associated with it.
As long as a SET[n], CLR[n] and OUT[n] task or an IN[n] event is configured to control a pin n, the pin's
output value will only be updated by the GPIOTE module. The pin's output value as specified in the GPIO
will therefore be ignored as long as the pin is controlled by GPIOTE. Attempting to write a pin as a normal
GPIO pin will have no effect. When the GPIOTE is disconnected from a pin, see MODE field in CONFIG[n]
register, the associated pin will get the output and configuration values specified in the GPIO module.
When conflicting tasks are triggered simultaneously (i.e. during the same clock cycle) in one channel, the
precedence of the tasks will be as described in Task priorities on page 124.
Priority
Task
1
OUT
2
CLR
3
SET
Table 40: Task priorities
When setting the CONFIG[n] registers, MODE=Disabled does not have the same effect as MODE=Task and
POLARITY=None. In the latter case, a CLR or SET task occurring at the exact same time as OUT will end up
with no change on the pin, according to the priorities described in the table above.
When a GPIOTE channel is configured to operate on a pin as a task, the initial value of that pin is
configured in the OUTINIT field of CONFIG[n].
6.9.2 Port event
PORT is an event that can be generated from multiple input pins using the GPIO DETECT signal.
The event will be generated on the rising edge of the DETECT signal. See GPIO — General purpose input/
output on page 115 for more information about the DETECT signal.
Putting the system into System ON IDLE while DETECT is high will not cause DETECT to wake the system
up again. Make sure to clear all DETECT sources before entering sleep. If the LATCH register is used as a
source, if any bit in LATCH is still high after clearing all or part of the register (for instance due to one of
the PINx.DETECT signal still high), a new rising edge will be generated on DETECT, see Pin configuration on
page 116.
Trying to put the system to System OFF while DETECT is high will cause a wakeup from System OFF reset.
This feature is always enabled although the peripheral itself appears to be IDLE, that is, no clocks or
other power intensive infrastructure have to be requested to keep this feature enabled. This feature can
therefore be used to wake up the CPU from a WFI or WFE type sleep in System ON with all peripherals and
the CPU idle, that is, lowest power consumption in System ON mode.
In order to prevent spurious interrupts from the PORT event while configuring the sources, the user
shall first disable interrupts on the PORT event (through INTENCLR.PORT), then configure the sources
(PIN_CNF[n].SENSE), clear any potential event that could have occurred during configuration (write '0' to
EVENTS_PORT), and finally enable interrupts (through INTENSET.PORT).
6.9.3 Tasks and events pin configuration
Each GPIOTE channel is associated with one physical GPIO pin through the CONFIG.PSEL field.
When Event mode is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will be configured
as an input, overriding the DIR setting in GPIO. Similarly, when Task mode is selected in CONFIG.MODE,
the pin specified by CONFIG.PSEL will be configured as an output overriding the DIR setting and OUT
value in GPIO. When Disabled is selected in CONFIG.MODE, the pin specified by CONFIG.PSEL will use its
configuration from the PIN[n].CNF registers in GPIO.
4454_140 v1.0
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