NRF52811-QCAA-R7 datasheet(52/444 Pages) NORDIC

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Power and clock management

5.3.5 RAM power control

The RAM power control registers are used for configuring the following:

• The RAM sections to be retained during System OFF

• The RAM sections to be retained and accessible during System ON

In System OFF, retention of a RAM section is configured in the RETENTION field of the corresponding

RAM[n] register.

In System ON, retention and accessibility for a RAM section is configured in the RETENTION and POWER

fields of the corresponding RAM[n] register.

The following table summarizes the behavior of these registers.

Configuration

RAM section status

System on/off

RAM[n].POWER.POWER

RAM[n].POWER.RETENTION Accessible

Retained

Off

Yes

Off

Off1

Yes

Table 14: RAM section configuration. x = don't care.

The advantage of not retaining RAM contents is that the overall current consumption is reduced.

See chapter Memory on page 16 for more information on RAM sections.

5.3.6 Reset

There are multiple sources that may trigger a reset.

After a reset has occurred, register RESETREAS can be read to determine which source generated the

reset.

5.3.6.1 Power-on reset

The power-on reset generator initializes the system at power-on.

The system is held in reset state until the supply has reached the minimum operating voltage and the

internal voltage regulators have started.

A step increase in supply voltage of 300 mV or more, with rise time of 300 ms or less, within the valid

supply range, may result in a system reset.

5.3.6.2 Pin reset

A pin reset is generated when the physical reset pin on the device is asserted.

Pin reset is configured via the PSELRESET[n] registers.

Note: Pin reset is not available on all pins.

5.3.6.3 Wakeup from System OFF mode reset

The device is reset when it wakes up from System OFF mode.

1 Not useful setting. RAM section power off gives negligible reduction in current consumption when

retention is on.

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