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NRF52811-QCAA-R7 bảng dữ liệu(PDF) 36 Page - Nordic Semiconductor |
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NRF52811-QCAA-R7 bảng dữ liệu(HTML) 36 Page - Nordic Semiconductor |
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36 / 444 page ![]() Core components An EasyDMA channel is implemented in the following way, but some variations may occur: READERBUFFER_SIZE 5 WRITERBUFFER_SIZE 6 uint8_t readerBuffer[READERBUFFER_SIZE] __at__ 0x20000000; uint8_t writerBuffer[WRITERBUFFER_SIZE] __at__ 0x20000005; // Configuring the READER channel MYPERIPHERAL->READER.MAXCNT = READERBUFFER_SIZE; MYPERIPHERAL->READER.PTR = &readerBuffer; // Configure the WRITER channel MYPERIPHERAL->WRITER.MAXCNT = WRITEERBUFFER_SIZE; MYPERIPHERAL->WRITER.PTR = &writerBuffer; This example shows a peripheral called MYPERIPHERAL that implements two EasyDMA channels - one for reading called READER, and one for writing called WRITER. When the peripheral is started, it is assumed that the peripheral will: • Read 5 bytes from the readerBuffer located in RAM at address 0x20000000. • Process the data. • Write no more than 6 bytes back to the writerBuffer located in RAM at address 0x20000005. The memory layout of these buffers is illustrated in EasyDMA memory layout on page 36. readerBuffer[0] readerBuffer[1] readerBuffer[2] readerBuffer[3] readerBuffer[4] writerBuffer[0] writerBuffer[1] writerBuffer[2] writerBuffer[3] writerBuffer[4] writerBuffer[5] 0x20000000 0x20000004 0x20000008 Figure 5: EasyDMA memory layout The WRITER.MAXCNT register should not be specified larger than the actual size of the buffer (writerBuffer). Otherwise, the channel would overflow the writerBuffer. Once an EasyDMA transfer is completed, the AMOUNT register can be read by the CPU to see how many bytes were transferred. For example, CPU can read MYPERIPHERAL->WRITER.AMOUNT register to see how many bytes WRITER wrote to RAM. Note that the PTR register of a READER or WRITER must point to a valid memory region before use. The reset value of a PTR register is not guaranteed to point to valid memory. See Memory on page 16 for more information about the different memory regions and EasyDMA connectivity. 4.6.1 EasyDMA error handling Some errors may occur during DMA handling. If READER.PTR or WRITER.PTR is not pointing to a valid memory region, an EasyDMA transfer may result in a HardFault or RAM corruption. See Memory on page 16 for more information about the different memory regions. 4454_140 v1.0 36 |
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