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NRF52811-QCAA-R7 bảng dữ liệu(PDF) 59 Page - Nordic Semiconductor |
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NRF52811-QCAA-R7 bảng dữ liệu(HTML) 59 Page - Nordic Semiconductor |
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59 / 444 page ![]() Power and clock management Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A A A A A A A A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW GPREGRET General purpose retention register This register is a retained register 5.3.9.13 DCDCEN Address offset: 0x578 DC/DC enable register Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A RW DCDCEN Enable or disable DC/DC converter Disabled 0 Disable Enabled 1 Enable 5.3.9.14 RAM[n].POWER (n=0..7) Address offset: 0x900 + (n × 0x10) RAMn power control register. The RAM size will vary depending on product variant, and the RAMn register will only be present if the corresponding RAM AHB slave is present on the device. Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID D C B A Reset 0x0000FFFF 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ID Access Field Value ID Value Description A-B RW S[i]POWER (i=0..1) Keep RAM section Si ON or OFF in System ON mode. RAM sections are always retained when ON, but can also be retained when OFF dependent on the settings in SiRETENTION. All RAM sections will be OFF in System OFF mode. Off 0 Off On 1 On C-D RW S[i]RETENTION (i=0..1) Keep retention on RAM section Si when RAM section is in OFF Off 0 Off On 1 On 5.3.9.15 RAM[n].POWERSET (n=0..7) Address offset: 0x904 + (n × 0x10) RAMn power control set register When read, this register will return the value of the POWER register. 4454_140 v1.0 59 |
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