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NRF52810-QFAA-R7 bảng dữ liệu(HTML) 88 Page - Nordic Semiconductor |
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88 / 483 page  Power and clock management 5.4.3 Registers Base address Peripheral Instance Description Configuration 0x40000000 CLOCK CLOCK Clock control Table 17: Instances Register Offset Description TASKS_HFCLKSTART 0x000 Start HFCLK crystal oscillator TASKS_HFCLKSTOP 0x004 Stop HFCLK crystal oscillator TASKS_LFCLKSTART 0x008 Start LFCLK source TASKS_LFCLKSTOP 0x00C Stop LFCLK source TASKS_CAL 0x010 Start calibration of LFRC oscillator TASKS_CTSTART 0x014 Start calibration timer TASKS_CTSTOP 0x018 Stop calibration timer EVENTS_HFCLKSTARTED0x100 HFCLK oscillator started EVENTS_LFCLKSTARTED 0x104 LFCLK started EVENTS_DONE 0x10C Calibration of LFCLK RC oscillator complete event EVENTS_CTTO 0x110 Calibration timer timeout INTENSET 0x304 Enable interrupt INTENCLR 0x308 Disable interrupt HFCLKRUN 0x408 Status indicating that HFCLKSTART task has been triggered HFCLKSTAT 0x40C HFCLK status LFCLKRUN 0x414 Status indicating that LFCLKSTART task has been triggered LFCLKSTAT 0x418 LFCLK status LFCLKSRCCOPY 0x41C Copy of LFCLKSRC register, set when LFCLKSTART task was triggered LFCLKSRC 0x518 Clock source for the LFCLK CTIV 0x538 Calibration timer interval Retained Table 18: Register Overview 5.4.3.1 INTENSET Address offset: 0x304 Enable interrupt Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Id D C B A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Id RW Field Value Id Value Description A RW HFCLKSTARTED Write '1' to Enable interrupt for HFCLKSTARTED event See EVENTS_HFCLKSTARTED Set 1 Enable Disabled 0 Read: Disabled Enabled 1 Read: Enabled B RW LFCLKSTARTED Write '1' to Enable interrupt for LFCLKSTARTED event See EVENTS_LFCLKSTARTED Set 1 Enable Disabled 0 Read: Disabled Enabled 1 Read: Enabled 4430_161 v1.0 88 |
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