HEF4013B

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© NXP Semiconductors N.V. 2015. All rights reserved.

Product data sheet

Rev. 9 — 10 December 2015

7 of 16

NXP Semiconductors

HEF4013B

Dual D-type flip-flop

[1]

Typical values of the propagation delays and output transition times can be calculated with the extrapolation formulas. CL is given in pF.

trec

recovery time

nSD input;

see Figure 5

5 V

+15

5-

ns

10 V

15

0

-

ns

15 V

15

0

-

ns

nCD input;

see Figure 5

5 V

40

25

-

ns

10 V

25

10

-

ns

15 V

25

10

-

ns

fclk(max)

maximum clock

frequency

see Figure 4

5 V

7

14

-

MHz

10 V

14

28

-

MHz

15 V

20

40

-

MHz

Table 7.

Dynamic characteristics …continued

Tamb = 25 C; unless otherwise specified. For test circuit see Figure 6.

Symbol Parameter

Conditions

VDD

Extrapolation formula

Min

Typ

Max Unit

Table 8.

Dynamic power dissipation

VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.

Symbol

Parameter

VDD

Typical formula

Where

PD

dynamic power dissipation

5 V

PD = 850  fi + (fo  CL)  VDD2 Wfi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

(f

o  CL) = sum of the outputs;

VDD = supply voltage in V.

10 V PD = 3600  fi + (fo  CL)  VDD2 W

15 V PD = 9000  fi + (fo  CL)  VDD2 W