RIVA128ZX datasheet(80/85 Pages) STMICROELECTRONICS

80 / 85 page

128-BIT 3D MULTIMEDIA ACCELERATOR

RIVA128ZX

80/85

Byte offsets 0x43 - 0x40

Writeable Subsystem Vendor ID (0x43 - 0x40)

Byte offsets 0x47 - 0x44

Capabilities Identifier Register (Offset = 0x47 - 0x44 = CAP_PTR)

0x43

0x42

0x41

0x40

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

76543

210

Bits

Function

RW I

31:16

This SUBSYSTEM_ID field is aliased at 0x2F - 0x2E where it is read-only. It

may be modified by System BIOS for systems which do not have a ROM on

the RIVA128ZX data pins. This will ensure valid data before enumeration by

the operating system.

RW 0

15:0

This SUB_VENDOR_ID field is aliased at 0x2D - 0x2C where it is read-only. It

may be modified by System BIOS for systems which do not have a ROM on

the RIVA128ZX data pins. This will ensure valid data before enumeration by

the operating system.

RW 0

0x47

0x46

0x45

0x44

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

76543

210

Bits

Function

RW I

31:24

Reserved = 0x00

R - 0

23:20

This field indicates the Major revision number of the AGP specification that

the RIVA128ZX conforms to.

= 0x01

R - 0x01

19:16

This field indicates the Minor revision number of the AGP specification that

the RIVA128ZX conforms to.

= 0x00

R - 0x00

15:8

NEXT_PTR contains the pointer to the next item in the capabilities list. This is

the last entry in the capabilities list, hence it contains a null pointer = 0x00.

R - 0x00

7:0

The CAP_ID field identifies the type of capability.

AGP = 0x02

R - 0x02

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