RX72N datasheet(2/179 Pages) RENESAS

2 / 179 page

RX72N Group

1. Overview

R01DS0343EJ0120 Rev.1.20

Page 2 of 179

Nov 15, 2023

Overview

1.1

Outline of Specifications

Table 1.1 lists the specifications in outline, and Table 1.2 give a comparison of the functions of products in different

packages.

Table 1.1 is an outline of maximum specifications, and the peripheral modules and the number of channels of the

modules differ depending on the number of pins on the package and the capacity of the code flash memory. For details,

refer to Table 1.2, Comparison of Functions for Different Packages.

Table 1.1

Outline of Specifications (1/11)

Classification

Module/Function

Description

CPU

 Maximum operating frequency: 240 MHz

 32-bit RX CPU (RXv3)

 Minimum instruction execution time: One instruction per state (cycle of the system

clock)

 Address space: 4-Gbyte linear

 Register set of the CPU

General purpose: Sixteen 32-bit registers

Control: Ten 32-bit registers

Accumulator: Two 72-bit registers

 113 instructions

Instructions installed as standard: 111

Basic instructions: 77

Single-precision floating-point operation instructions: 11

DSP instructions: 23

Instructions for register bank save function: 2

 Addressing modes: 11

 Data arrangement

Instructions: Little endian

Data: Selectable as little endian or big endian

 On-chip 32-bit multiplier: 32 × 32 → 64 bits

 On-chip divider: 32 / 32 → 32 bits

 Barrel shifter: 32 bits

FPU

 Single-precision floating-point numbers (32 bits) and double-precision floating-point

numbers (64 bits)

 Data types and floating-point exceptions in conformance with the IEEE754 standard

Double-precision

floating point

coprocessor

 Double-precision floating-point register set

Double-precision floating-point data registers: 16, each with 64-bit width

Double-precision floating-point control registers: Four, each with 32-bit width

 Double-precision floating-point processing instructions: 21

 Notifying the interrupt controller of double-precision floating-point exceptions

function

 Fast collective saving and restoration of the values of CPU registers

 16 save register banks

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