RX72N datasheet(12/179 Pages) RENESAS

12 / 179 page

RX72N Group

1. Overview

R01DS0343EJ0120 Rev.1.20

Page 12 of 179

Nov 15, 2023

Note 1. When the realtime clock is not used, initialize the registers in the time clock according to description in section 33.6.7,

Initialization Procedure When the Realtime Clock is Not to be Used in the User’s Manual: Hardware.

Note 2. Magic PacketTM is a registered trademark of Advanced Micro Devices, Inc.

Note 3. The product part number differs according to whether or not the MCU includes the encryption function.

Note 4. The low CL crystal unit cannot be used when the VBATT voltage is less than 2.0 V.

Safety

Clock frequency

accuracy measurement

circuit (CAC)

 Monitors the clock output from the main clock oscillator, sub-clock oscillator, low- and

high-speed on-chip oscillators, IWDT-dedicated on-chip oscillator, USB clock, Ethernet-

PHY external clock, and PCLKB, and generates interrupts when the setting range is

exceeded.

Data operation circuit

(DOC)

 The function to compare, add, or subtract 16-bit data

Encryption

function

Trusted Secure IP

(TSIP)*3

 Security algorithm

Common key encryption: AES (compliant with NIST FIPS PUB 197), TDES, ARC4

Non-common key encryption: RSA

 Other features

TRNG (true-random number generator)

Hash value generation: SHA1, SHA224, SHA256, MD5, GHASH

Prevention of the illicit copying of keys

Operating frequency

Up to 240 MHz

Power supply voltage

VCC = AVCC0 = AVCC1 = VCC_USB = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0,

VBATT = 1.62 to 3.6 V*4

Operating temperature

D-version: –40 to +85°C

G-version: –40 to +105°C

Package

224-pin LFBGA (PLBG0224GA-A)

176-pin LFBGA (PLBG0176GA-A)

176-pin LFQFP (PLQP0176KB-C)

145-pin TFLGA (PTLG0145KA-A)

144-pin LFQFP (PLQP0144KA-B)

100-pin LFQFP (PLQP0100KB-B)

On-chip debugging system

 E1 emulator (JTAG and FINE interfaces)

Table 1.1

Outline of Specifications (11/11)

Classification

Module/Function

Description

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