FN8724 datasheet(28/34 Pages) RENESAS

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ISL98608IIH

FN8724 Rev.2.01

Page 28 of 33

Dec 7, 2021

Fault Protection and Monitoring

The ISL98608IIH features extensive protections to automatically

handle failure conditions and protect the IC and application from

damage.

OVERCURRENT PROTECTION (OCP)

The overcurrent protection limits the VBST nMOSFET current on a

cycle-by-cycle basis. When the nMOSFET current reaches the

current limit threshold, the nMOSFET is turned off for the

remainder of that cycle. Overcurrent protection does not disable

any of the regulators. Once the fault is removed, the IC will

continue with normal operation.

UNDERVOLTAGE LOCKOUT (UVLO)

If the input voltage (VIN) falls below the VUVLO_HYS level of ~2.3V

(typical), the VBST, VP and VN regulators will be disabled. All the

rails will restart with normal soft-start operation when the VIN

input voltage is applied again (rising VIN > VUVLO). Refer to the

“Electrical Specifications” table on page 6 for the UVLO

specifications.

Note, the I2C registers (logic) are not cleared/reset to default by

the falling VIN UVLO. The logic states are retained if VIN remains

above 2V (typical). Once VIN falls below 2V, all logic is reset. VIN

should fall below 2V (ideally to GND) before power is reapplied to

ensure a full power cycle/reset of the device.

OVER-TEMPERATURE PROTECTION (OTP)

The ISL98608IIH has a hysteretic over-temperature protection

threshold set at +150°C (typical). If this threshold is reached, the

VBST, VP and VN regulators are disabled immediately. As soon as

temperature falls by 20°C (typical) then all the regulators

automatically restart.

All register bits, except for Bit <b0> of the FAULT register

(Register Address 0x04), remain unaffected during an OTP fault

event. When an OTP event occurs, FAULT register bit <b0> is

latched to ‘1’. This bit is reset/cleared by cycling both ENN and

ENP (set LOW, then HIGH) at the same time, or by cycling VIN

power. Bit <b0> can also be reset after it is read twice by I2C. A

single I2C read will return the bit value (status) and a second read

will reset only the OTP bit.

Output undervoltage protection is disabled during an OTP event.

Since the output voltages decrease during an OTP event because

the regulators are disabled, this will not trigger a UVP fault.

UNDERVOLTAGE PROTECTION (UVP)

The ISL98608IIH includes output undervoltage protection.

Undervoltage protection disables the regulator whenever the

output voltage of VBST or VP falls below 60% of its set/regulated

voltage, or the output voltage of VN goes above 60% of its

set/regulated voltage, for 100µs or more. If the output voltage

exceeds the 60% condition for less than 100µs, no fault will

occur.

Depending on which regulator(s) fault, bit(s) <b3>, <b2>, or <b1>

in the FAULT register will be latched to ‘1’ for VP, VN and VBST

faults, respectively. The bit(s) are reset/cleared by cycling both

ENN and ENP (set LOW, then HIGH) at the same time or by

cycling VIN power.

Undervoltage protection can be disabled by making selection

from register 0x05<b5>.

Component Selection

The design of the boost converter is simplified by an internal

compensation scheme, which allows an easy system design

without complicated calculations. Select component values

using the following recommendations.

Input Capacitor

It is recommended that a 10µF X5R/X7R or equivalent ceramic

capacitor is placed on the VIN input supply to ground.

Inductor

First, determine the minimum inductor saturation current

required for the application.

The ISL98608IIH operates in Continuous Conduction Mode (CCM)

at higher load current and in Discontinuous Conduction Mode

(DCM) at lighter loads. In CCM, we can calculate the peak

inductor current using Equations 5 through 9.

Given these parameters:

•Input Voltage = VIN

• Output Voltage = VO

•Duty Cycle = D

• Switching Frequency = fSW

•tSW =1/fSW

Then the inductor ripple can be calculated as:

Where D = 1 - (VIN/VO), then rewrite Equation 5:

The average inductor current is equal to the average input

current, where IIAVG can be calculated from the efficiency of the

converter.

To find the peak inductor current write the expression as:

Substituting Equations 6 and 7 in Equation 8 to calculate IPk:

I

P-P

VIN

 D







f

SW 

(EQ. 5)

I

P-P

VIN

 V

VIN

–







f

V

O 

(EQ. 6)

IIAVG

VOIO

 V

Efficiency





(EQ. 7)

IPk IP-P 2



IIAVG

(EQ. 8)

IPK

0.5VIN VO VIN

–

 f

V

O 



I

O 





EFF





(EQ. 9)

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