XM33C321ASPZR datasheet(6/113 Pages) TI2

6 / 113 page

6 Pin Configuration and Functions

The System Configuration tool provides a graphical interface to enable, configurable, and generate initialization

code for pin multiplexing and simplifying pin settings. The following pin diagrams show the primary peripheral

functions, some of the integrated device features, and available clock signals to simplify the device pinout. For

full descriptions of the pin functions, see the Pin Attributes and Signal Descriptions sections.

6.1 Pin Diagrams

For full pin configuration and functions for each package option, refer to Pin Attributes (PFA, PZ, PN, PM, RGZ,

ZAW Packages) and Signal Descriptions

Not to scale

VCORE

VSS

VBAT

VDD

PA2

PA3

PA4

PA5

PA6

PB31

PB26

PA27

PA29

NRST

PC15

PC14

PA7

PB5

PB29

PC17

PB25

PA26

PA28

PA1

PC12

PB0

PB1

PB2

TDO

PC18

PA25

PB27

PA0

PA30

PC13

PC28

PB30

PB3

PB4

PA8

PA23

PA24

PC27

PC25

PC11

PC16

PA10

PB28

PA11

PB6

PC26

PB24

PB20

PC9

PC10

PC29

PC19

PB7

PB8

PB10

PB23

PB21

PC7

PC8

PC5

PC4

PB9

PB15

PB11

PB12

PB22

TDI

PC6

PC3

PC2

PC21

PA16

PC1

PC20

PB13

PB19

PA21

SWCLK

SWDIO

PC24

PC23

PC0

PB16

PB14

PA12

PB18

PB17

PA18

PA17

PC22

VDD

PA15

PA14

VSS

PA13

Figure 6-1. 100-pin ZAW (0.8mm) (NFBGA) Package Diagram (Top View)

MSPM33C321A, MSPM33C3219

SLASFB6 – DECEMBER 2025

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