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XM33C321ASPZR bảng dữ liệu(PDF) 53 Page - Texas Instruments

tên linh kiện XM33C321ASPZR
Giải thích chi tiết về linh kiện  MSPM33C321x Mixed-Signal Microcontrollers
PDF  113 Pages
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XM33C321ASPZR bảng dữ liệu(HTML) 53 Page - Texas Instruments

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7.10.3.2 SPI Timing Diagram
SCLK
(SPO = 0)
POCI
SCLK
(SPO = 1)
CS
(inverted)
CS
PICO
tCS, LEAD
tCS, ACC
tCS, LAG
tCS, DIS
tSU,CI
tHD,CI
tVALID,CO
tHD,CO
1 / fSPI
tSCLK_H/L
tSCLK_H/L
Controller Mode, SPH = 0
CS
(inverted)
CS
tCS, LEAD
tCS, ACC
tCS, LAG
tCS, DIS
tSU,CI
tHD,CI
tVALID,CO
tHD,CO
SCLK
(SPO = 0)
POCI
SCLK
(SPO = 1)
PICO
1 / fSPI
tSCLK_H/L
tSCLK_H/L
Controller Mode, SPH = 1
Figure 7-4. SPI Timing Diagram - Controller Mode
CS
(inverted)
CS
tCS, LEAD
tCS, ACC
tCS, LAG
tCS, DIS
tSU,PI
tHD,PI
tVALID,PO
tHD,PO
SCLK
(SPO = 0)
PICO
SCLK
(SPO = 1)
POCI
1 / fSPI
tSCLK_H/L
tSCLK_H/L
Peripheral Mode, SPH = 0
CS
(inverted)
CS
tCS, LEAD
tCS, ACC
tCS, LAG
tCS, DIS
tSU,PI
tHD,PI
tVALID,PO
tHD,PO
SCLK
(SPO = 0)
PICO
SCLK
(SPO = 1)
POCI
1 / fSPI
tSCLK_H/L
tSCLK_H/L
Peripheral Mode, SPH = 1
Figure 7-5. SPI Timing Diagram - Peripheral Mode
7.10.4 CAN
7.10.4.1 CAN
over operating free-air temperature range (unless otherwise noted)
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fCANCLK CAN input clock frequency
80
MHz
fBAUD
CAN Baud rate
5
Mbps
7.10.5 QSPI
www.ti.com
MSPM33C321A, MSPM33C3219
SLASFB6 – DECEMBER 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: MSPM33C321A MSPM33C3219



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