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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TAS5613APHD bảng dữ liệu(PDF) 5 Page - Texas Instruments |
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TAS5613APHD bảng dữ liệu(HTML) 5 Page - Texas Instruments |
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5 / 33 page  TAS5613A www.ti.com SLAS711B – JUNE 2010 – REVISED SEPTEMBER 2011 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT PVDD_x Half-bridge supply DC supply voltage 18 36 38 V Supply for logic regulators and GVDD_x DC supply voltage 10.8 12 13.2 V gate-drive circuitry VDD Digital regulator supply voltage DC supply voltage 10.8 12 13.2 V RL(BTL) 3.5 4 Output filter according to Figure 12 and RL(SE) Load impedance 2.8 3 Ω Figure 13 RL(PBTL) 1.6 2 Output filter according to Figure 12 + RL (BTL) Load impedance 2.8 3 Ω Schottky, ROC = 22kΩ LOUT(BTL) 7 10 LOUT(SE) Output filter inductance Minimum output inductance at IOC 7 15 μH LOUT(PBTL) 7 10 Nominal 385 400 415 PWM frame rate selectable for AM FPWM interference avoidance; 1% AM1 315 333 350 kHz Resistor tolerance AM2 260 300 335 Nominal; Master mode 9.9 10 10.1 PWM frame rate programming RFREQ_ADJ AM1; Master mode 19.8 20 20.2 k Ω resistor AM2; Master mode 29.7 30 30.3 CPVDD PVDD close decoupling capacitors 2.0 μF ROC Over-current programming resistor Resistor tolerance = 5% 22 30 k Ω ROC_LATCHED Over-current programming resistor Resistor tolerance = 5% 47 64 k Ω Voltage on FREQ_ADJ pin for VFREQ_ADJ Slave mode 3.3 V slave mode operation TJ Junction temperature 0 125 °C PIN FUNCTIONS PIN FUNCTION(1) DESCRIPTION NAME PHD NO. DKD NO. AGND 8 10 P Analog ground BST_A 54 43 P HS bootstrap supply (BST), external 0.033 μF capacitor to OUT_A required. BST_B 41 34 P HS bootstrap supply (BST), external 0.033 μF capacitor to OUT_B required. BST_C 40 33 P HS bootstrap supply (BST), external 0.033 μF capacitor to OUT_C required. BST_D 27 24 P HS bootstrap supply (BST), external 0.033 μF capacitor to OUT_D required. CLIP 18 – O Clipping warning; open drain; active low C_STARTUP 3 5 O Startup ramp requires a charging capacitor of 4.7nF to GND FREQ_ADJ 12 14 I PWM frame rate programming pin requires resistor to GND 7, 23, 24, GND 9 P Ground 57, 58 GND_A 48, 49 38 P Power ground for half-bridge A GND_B 46, 47 37 P Power ground for half-bridge B GND_C 34, 35 30 P Power ground for half-bridge C GND_D 32, 33 29 P Power ground for half-bridge D GVDD_A 55 – P Gate drive voltage supply requires 0.1 μF capacitor to GND_A GVDD_B 56 – P Gate drive voltage supply requires 0.1 μF capacitor to GND_B GVDD_C 25 – P Gate drive voltage supply requires 0.1 μF capacitor to GND_C GVDD_D 26 - P Gate drive voltage supply requires 0.1 uF capacitor to GND_D GVDD_AB – 44 P Gate drive voltage supply requires 0.22 μF capacitor to GND_A/GND_B GVDD_CD – 23 P Gate drive voltage supply requires 0.22 μF capacitor to GND_C/GND_D (1) I = Input, O = Output, P = Power Copyright © 2010–2011, Texas Instruments Incorporated 5 |
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