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SN75C3222 bảng dữ liệu(PDF) 8 Page - Texas Instruments |
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SN75C3222 bảng dữ liệu(HTML) 8 Page - Texas Instruments |
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8 / 26 page ![]() 7.9 Receiver Section: Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 10-1) PARAMETER TEST CONDITIONS(1) MIN TYP(2) MAX UNIT VOH High-level output voltage IOH = –1 mA VCC – 0.6 V VCC – 0.1 V V VOL Low-level output voltage IOL = 1.6 mA 0.4 V VIT+ Positive-going input threshold voltage VCC = 3.3 V 1.6 2.4 V VCC = 5 V 1.9 2.4 VIT– Negative-going input threshold voltage VCC = 3.3 V 0.6 1.1 V VCC = 5 V 0.8 1.4 Vhys Input hysteresis (VIT+ – VIT–) 0.5 V Ioff Output leakage current FORCEOFF = 0 V ±0.05 ±10 μA ri Input resistance VI = ±3 V to ±25 V 3 5 7 kΩ (1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. (2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. 7.10 Switching Characteristics: Receiver over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 10-1) PARAMETER TEST CONDITIONS(1) TYP(2) UNIT tPLH Propagation delay time, low- to high-level output CL = 150 pF, See Figure 8-3 150 ns tPHL Propagation delay time, high- to low-level output CL = 150 pF, See Figure 8-3 150 ns ten Output enable time CL = 150 pF, RL = 3 kΩ, See Figure 8-4 200 ns tdis Output disable time CL = 150 pF, RL = 3 kΩ, See Figure 8-4 200 ns tsk(p) Pulse skew(3) See Figure 8-3 50 ns (1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. (2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. (3) Pulse skew is defined as |tPLH - tPHL| of each channel of the same device. SN65C3221E, SN75C3221E SLLS694C – NOVEMBER 2005 – REVISED JULY 2021 www.ti.com 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: SN65C3221E SN75C3221E |
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