SCANSTA101SMSLASHNOPB datasheet(31/42 Pages) TI2

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SCANSTA101

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SNLS057J – MAY 2002 – REVISED APRIL 2013

Table 30. Header/Trailer Index Register (HTINDEXR) ($13) (1)(2)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15:0

Header/Trailer Index

0000h

SYS_RST

(1)

Header/Trailer Index<15:0> sets the Header/Trailer address memory pointer.

(2)

Address memory pointer must be on a long word boundary.

Table 31. Macro Index Register (MINDEXR) ($15) (1)(2)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15:0

Macro Index

0000h

SYS_RST

(1)

Macro Index<15:0> sets the Macro address memory pointer.

(2)

Address memory pointer must be on a long word boundary.

Table 32. Sequencer Index Register (SINDEXR) ($17) (1)(2)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15:0

Sequencer Index

0000h

SYS_RST

(1)

Sequencer Index<15:0> sets the Sequencer address memory pointer.

(2)

Address memory pointer must be on a long word boundary.

Table 33. ScanBridge Support Index Register (BSINDEXR) ($19) (1)(2)

Bit(s)

Type

Field

Address Offset

Reset Value

Reset Source

15:0

ScanBridge Index

0000h

SYS_RST

(1)

ScanBridge Index<15:0> sets the ScanBridge Support address memory pointer.

(2)

Address memory pointer must be on a long word boundary.

TESTABILITY DETAILS - IEEE 1149.1 SUPPORT

Table 34. Supported IEEE 1149.1 Instruction Set

Instruction Mnemonic

Binary Instruction Code

Description

EXTEST

000

Allows off-chip circuitry and interconnect to be tested.

SAMPLE/PRELOAD

001

Allows snapshot of normal operation. Also allows data to be loaded on

parallel output boundary scan registers.

BYPASS

111

Places device in bypass mode so that there is single shift register stage

between TDI and TDO.

IDCODE

010

Allows scanning of the device identification register.

HIGHZ

011

Will TRI-STATE all output drivers with the exception of TDO.

CLAMP

100

Allows the state of the signals driven from component pins to be

determined from the boundary-scan register while the BYPASS register

is selected as the serial path between TDI and TDO.

RUNBIST

110

Enables on chip BIST logic to perform memory BIST.

SCANTEST

101

Allows the assertion of internal test_mode signal to prevent the

asynchronous resets from inadvertently resetting the flip-flops during

internal scan. Used in factory test.

Table 35. IDCODE Register Description

Version

Part Number

Manufacturer Identity

Start Bit

"0000"

"1111 1100 0001 0111"

"000 0000 1111"

"1"

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